Intel kicked off its annual Developer Forum in San Francisco with a pre briefing that put meat onto the bone of a concept it kicked off a couple of years ago – the era of Tera.
As computers need increasing performance, the people using them want to interact with them in a more natural way, and the processor giant is putting money and time behind the Tera Scale Computing Research program.
Now a set of over 80 projects, it aims to develop technology allowing software in the future to have far higher performance capabilities, taking advantage of tens or hundreds of cores within a CPU.
Justin Rattner, chief technology officer at Intel, explained: 'What's motivating the transition is that multi-core is an effective way of getting more performance using less energy. We see multi-core as giving us the ability to get back on the traditional performance growth line we had begun to shift away from.'
The main challenges in the project will be to develop memory bandwidth and learn how to program software that can dedicate individual processes to individual cores within the die. And this means Intel – and programmers in the future – must understand how to design software to take advantage of so many threads.
The projects are split into three main areas – silicon, platform and software - with a number of sub-projects within each group.
One of the biggest problems today that Intel is attempting to crack is that of having to lock memory so that software cannot use multiple threads, to ensure that processes or programs do not return incorrect results or actions - such as miscalculating the amount of available money in a bank account.
Intel believes that a project looking at transactional memory shows promise to solve this problem. It uses Java and allows hardware and software to discover when there is a conflict, simplifies programs and removes many of the problems with locks. It also means programs and processes run much faster, because they can then use multiple CPU cores.
Rattner said: 'We have to solve this problem is we are going to exploit the potential of high core count processors.'
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